58 search results - page 3 / 12 » Routing in a New 2-Dimensional FPGA FPIC Routing Architectur... |
76
Voted
FPGA
2001
ACM
15 years 2 months ago
2001
ACM
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
81
Voted
IPPS
2006
IEEE
15 years 4 months ago
2006
IEEE
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
To improve FPGA performance for arithmetic circuits, this paper proposes a new architecture for FPGA logic cells that includes a 6:2 compressor. The new cell features additional f...
78
Voted
NOCS
2007
IEEE
15 years 4 months ago
2007
IEEE
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...
IPPS
1999
IEEE
15 years 2 months ago
1999
IEEE
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...