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DAC
2011
ACM
13 years 9 months ago
Fault-tolerant 3D clock network
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...
INFOCOM
2006
IEEE
15 years 3 months ago
LEDS: Providing Location-Aware End-to-End Data Security in Wireless Sensor Networks
Abstract— Providing end-to-end data security, i.e., data confidentiality, authenticity, and availability, in wireless sensor networks (WSNs) is a non-trivial task. In addition t...
Kui Ren, Wenjing Lou, Yanchao Zhang
DSD
2002
IEEE
96views Hardware» more  DSD 2002»
15 years 2 months ago
Networks on Silicon: Blessing or Nightmare?
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
Paul Wielage, Kees G. W. Goossens
SIGCOMM
2009
ACM
15 years 4 months ago
A standalone content sharing application for spontaneous communities of mobile handhelds
This demo illustrates the benefits of BitHoc, a standalone protocol for content sharing among spontaneous communities of mobile handhelds using wireless multi-hop connections. Bi...
Amir Krifa, Mohamed Karim Sbai, Chadi Barakat, Thi...
SIGCOMM
2009
ACM
15 years 4 months ago
SmartRE: an architecture for coordinated network-wide redundancy elimination
Application-independent Redundancy Elimination (RE), or identifying and removing repeated content from network transfers, has been used with great success for improving network pe...
Ashok Anand, Vyas Sekar, Aditya Akella