An important aspect of Design for Yield for embedded SRAM is identifying the expected worst case behavior in order to guarantee that sufficient design margin is present. Previousl...
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
We propose a robust circuit-based Boolean Satisfiability (SAT) solver, QuteSAT, that can be applied to complex circuit netlist structure. Several novel techniques are proposed in ...
High assurance in embedded system software is difficult to attain. Verification relies on testing. The unreliable and costly testing process is made much worse because the softwar...
Generally, Distributed video coding (DVC) schemes perform motion estimation at the decoder side, without the current frame being available. In order to generate the side-informati...