32 search results - page 3 / 7 » Run-Time Verification |
100
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AMAST
2008
Springer
14 years 11 months ago
2008
Springer
Several proof systems allow the formal verification of Java programs, and a specification language was specifically designed for Java. However, none of these systems support generi...
172
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POPL
2006
ACM
15 years 10 months ago
2006
ACM
Traditional static type systems are very effective for verifying basic interface specifications, but are somewhat limited in the kinds specificationsthey support. Dynamically-chec...
100
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FDL
2003
IEEE
15 years 3 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
FPL
2000
Springer
15 years 1 months ago
2000
Springer
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
80
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DAC
2004
ACM
15 years 10 months ago
2004
ACM
Instances of the Boolean satisfiability problem (SAT) arise in many areas of circuit design and verification. These instances are typically constructed from some human-designed ar...