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» Runtime Prediction of Real Programs on Real Machines
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DSN
2007
IEEE
15 years 8 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
ICC
2007
IEEE
141views Communications» more  ICC 2007»
15 years 8 months ago
A Hybrid Model to Detect Malicious Executables
— We present a hybrid data mining approach to detect malicious executables. In this approach we identify important features of the malicious and benign executables. These feature...
Mohammad M. Masud, Latifur Khan, Bhavani M. Thurai...
ICS
2005
Tsinghua U.
15 years 7 months ago
Optimization of MPI collective communication on BlueGene/L systems
BlueGene/L is currently the world’s fastest supercomputer. It consists of a large number of low power dual-processor compute nodes interconnected by high speed torus and collect...
George Almási, Philip Heidelberger, Charles...
ASAP
1997
IEEE
144views Hardware» more  ASAP 1997»
15 years 6 months ago
Automatic data mapping of signal processing applications
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
Corinne Ancourt, Denis Barthou, Christophe Guettie...
IPPS
1994
IEEE
15 years 6 months ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...