36 search results - page 5 / 8 » Runtime and quality tradeoffs in FPGA placement and routing |
FPL
2010
Springer
14 years 7 months ago
2010
Springer
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Because of the increasing dominance of interconnect issues in advanced IC technology, placement has become a critical step in the IC design flow. To get accurate interconnect inf...
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ISPD
2010
ACM
15 years 4 months ago
2010
ACM
Existing 3D placement techniques are mainly used for standardcell circuits, while mixed-size placement is needed to support highlevel functional units and intellectual property (I...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Dramatic progress has been made in algorithms for placement and routing over the last 5 years, with improvements in both speed and quality. Combining placement and routing into a ...
VLSID
2005
IEEE
15 years 9 months ago
2005
IEEE
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...