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» SADL: Simulation Architecture Description Language
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APCSAC
2001
IEEE
15 years 3 months ago
Retargetable Cache Simulation Using High Level Processor Models
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
Rajiv A. Ravindran, Rajat Moona
107
Voted
FDL
2007
IEEE
15 years 6 months ago
APDL: A Processor Description Language For Design Space Exploration of Embedded Processors
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...
Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, ...
IPPS
2003
IEEE
15 years 5 months ago
The CoGenT Project: Co-Generating Compilers and Simulators for Dynamically Compiled Languages
To understand the performance of modern Java systems one must observe execution in the context of specific architectures. It is also important that we make these observations usi...
J. Eliot B. Moss, Charles C. Weems, Timothy Richar...
89
Voted
FMOODS
2006
15 years 1 months ago
Bounded Analysis and Decomposition for Behavioural Descriptions of Components
Abstract. Explicit behavioural interfaces are now accepted as a mandatory feature of components to address architectural analysis. Behavioural interface description languages shoul...
Pascal Poizat, Jean-Claude Royer, Gwen Salaün
284
Voted
DAC
2012
ACM
13 years 2 months ago
Chisel: constructing hardware in a Scala embedded language
In this paper we introduce Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific h...
Jonathan Bachrach, Huy Vo, Brian Richards, Yunsup ...