261 search results - page 15 / 53 » SAT-Based Algorithms for Logic Minimization |
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
CF
2008
ACM
14 years 11 months ago
2008
ACM
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
ICCAD
1996
IEEE
15 years 1 months ago
1996
IEEE
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
RSCTC
2000
Springer
15 years 1 months ago
2000
Springer
Feature selection is used to improve performance of learning algorithms by finding a minimal subset of relevant features. Since the process of feature selection is computationally ...