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» SAT-Based Algorithms for Logic Minimization
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FPGA
2005
ACM
80views FPGA» more  FPGA 2005»
15 years 3 months ago
Simultaneous timing-driven placement and duplication
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
Gang Chen, Jason Cong
ISAAC
1995
Springer
135views Algorithms» more  ISAAC 1995»
15 years 1 months ago
The I/O - Complexity of Ordered Binary - Decision Diagram Manipulation
Ordered Binary-Decision Diagrams (OBDD) are the state-of-the-art data structure for boolean function manipulation and there exist several software packages for OBDD manipulation. ...
Lars Arge
TMC
2012
13 years 6 days ago
Mobile Data Offloading through Opportunistic Communications and Social Participation
—3G networks are currently overloaded, due to the increasing popularity of various applications for smartphones. Offloading mobile data traffic through opportunistic communicatio...
Bo Han, Pan Hui, V. S. Anil Kumar, Madhav V. Marat...
LISA
2007
15 years 4 days ago
Network Patterns in Cfengine and Scalable Data Aggregation
Network patterns are based on generic algorithms that execute on tree-based overlays. A set of such patterns has been developed at KTH to support distributed monitoring in network...
Mark Burgess, Matthew Disney, Rolf Stadler
CORR
2007
Springer
64views Education» more  CORR 2007»
14 years 9 months ago
Generating models for temporal representations
We discuss the use of model building for temporal representations. We chose Polish to illustrate our discussion because it has an interesting aspectual system, but the points we w...
Patrick Blackburn, Sébastien Hinderer