We propose a two-pha.se algorithm for physical database design. In phase one the algorithm, for each logical query, losesrules to determine characteristics of a physical design (s...
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
Disruption on a supply chain provokes lost that should be minimized looking for alternative suppliers. This solution involves a strategy to manage the impact of the disruption and ...
Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process technologies. This trend will only strengthen with futu...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
This paper presents algorithms that (1) facilitate systemindependent synthesis of timing-interfaces for subsystems and (2) system-level selection of interfaces to minimize CPU loa...
Insik Shin, Moris Behnam, Thomas Nolte, Mikael Nol...