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» SAT-Based Algorithms for Logic Minimization
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MICRO
1998
IEEE
91views Hardware» more  MICRO 1998»
15 years 2 months ago
Effective Cluster Assignment for Modulo Scheduling
Clustering is one solution to the demand for wideissue machines and fast clock cycles because it allows for smaller, less ported register files and simpler bypass logic while rema...
Erik Nystrom, Alexandre E. Eichenberger
FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
15 years 1 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 6 months ago
Platform-based resource binding using a distributed register-file microarchitecture
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
Jason Cong, Yiping Fan, Wei Jiang
ICCAD
2006
IEEE
149views Hardware» more  ICCAD 2006»
15 years 6 months ago
Thermal sensor allocation and placement for reconfigurable systems
Temperature monitoring using thermal sensors is an essential tool for evaluating the thermal behavior and sustaining the reliable operation in high-performance and high-power syst...
Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci...
AI
2010
Springer
14 years 10 months ago
Logic-based ontology comparison and module extraction, with an application to DL-Lite
We develop a formal framework for comparing different versions of ontologies, and apply it to ontologies formulated in terms of DL-Lite, a family of `lightweight' description...
Roman Kontchakov, Frank Wolter, Michael Zakharyasc...