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» SAT-Based Algorithms for Logic Minimization
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GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Transition-activity aware design of reduction-stages for parallel multipliers
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...
ANCS
2005
ACM
15 years 3 months ago
Segmented hash: an efficient hash table implementation for high performance networking subsystems
Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite freq...
Sailesh Kumar, Patrick Crowley
DAC
2008
ACM
15 years 10 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
WWW
2007
ACM
15 years 10 months ago
Just the right amount: extracting modules from ontologies
The ability to extract meaningful fragments from an ontology is key for ontology re-use. We propose a definition of a module that guarantees to completely capture the meaning of a...
Bernardo Cuenca Grau, Ian Horrocks, Yevgeny Kazako...
CSB
2005
IEEE
155views Bioinformatics» more  CSB 2005»
15 years 3 months ago
BioNavigation: Using Ontologies to Express Meaningful Navigational Queries Over Biological Resources
Exploiting the complex maze of publicly available Biological resources to implement scientific data collection pipelines poses a multitude of challenges to biologists in accurate...
Zoé Lacroix, Kaushal Parekh, Maria-Esther V...