261 search results - page 7 / 53 » SAT-Based Algorithms for Logic Minimization |
ASPDAC
1995
ACM
15 years 1 months ago
1995
ACM
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
DDECS
2008
IEEE
15 years 4 months ago
2008
IEEE
: We propose a simple and fast two-level minimization algorithm for completely specified functions in this paper. The algorithm is based on processing ternary trees. A ternary tree...
ISMVL
1999
IEEE
15 years 2 months ago
1999
IEEE
This paper considers an optimization method of programmable logic arrays (PLAs), which have two-input EXOR gate at the outputs. The PLA realizes an EXOR of two sum-of-products exp...
INTEGRATION
2008
14 years 9 months ago
2008
In this paper an efficient algorithm for the synthesis and exact minimization of ESCT(Exclusive or Sum of Complex Terms) expressions for Boolean functions of at most six variables...
CDES
2008
14 years 11 months ago
2008
In this paper an algorithm is proposed for the synthesis and exact minimization of ESCT (Exclusive or Sum of Complex Terms) expressions for Boolean functions of up to seven comple...