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» SDL-2000: A Language with a Formal Semantics
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CAV
2009
Springer
177views Hardware» more  CAV 2009»
15 years 10 months ago
Software Transactional Memory on Relaxed Memory Models
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh
VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
15 years 10 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
73
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EMSOFT
2009
Springer
15 years 4 months ago
Probabilistic modeling of data cache behavior
In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this g...
Vinayak Puranik, Tulika Mitra, Y. N. Srikant
RSP
2008
IEEE
118views Control Systems» more  RSP 2008»
15 years 4 months ago
Functional DIF for Rapid Prototyping
Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity in...
William Plishker, Nimish Sane, Mary Kiemb, Kapil A...
ER
2007
Springer
127views Database» more  ER 2007»
15 years 3 months ago
Generic Schema Mappings
Schema mappings come in different flavors: simple correspondences are produced by schema matchers, intensional mappings are used for schema integration. However, the execution of ...
David Kensche, Christoph Quix, Yong Li, Matthias J...