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» SEU tolerant device, circuit and processor design
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LCTRTS
2010
Springer
15 years 2 months ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
DAC
2005
ACM
15 years 10 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
HPCA
2012
IEEE
13 years 5 months ago
Flexible register management using reference counting
Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. We ...
Steven Battle, Andrew D. Hilton, Mark Hempstead, A...
EUROGP
2009
Springer
105views Optimization» more  EUROGP 2009»
15 years 2 months ago
Quantum Circuit Synthesis with Adaptive Parameters Control
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mir...
WISES
2004
14 years 11 months ago
Embedded Real-Time-Tracer - An Approach with IDE
-- Debugging software that runs on highly integrated System-on-Chip devices is complicated because conventional debug tools (like traditional In-Circuit Emulators and Logic Analyze...
Babak Rahbaran, Matthias Függer, Andreas Stei...