103 search results - page 15 / 21 » SEU tolerant device, circuit and processor design |
GI
2004
Springer
15 years 3 months ago
2004
Springer
: The transition from microelectronics to nanoelectronics reaches physical limits and results in a paradigm shift in the design and fabrication of electronic circuits. The conserva...
FPL
2005
Springer
15 years 3 months ago
2005
Springer
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...
ARC
2008
Springer
14 years 11 months ago
2008
Springer
Over the last years, we have witnessed the increased use of Application-Specific Instruction-Set Processors (ASIPs). These ASIPs are processors that have a customizable instruction...
TCAD
2008
14 years 9 months ago
2008
Abstract--The fabrication of crossbar memories with sublithographic features is expected to be feasible within several emerging technologies; in all of them, the nanowire (NW) deco...
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
The relative tolerances for interconnect and device parameter variations have not scaled with feature sizes which have brought about significant performance variability. As we sca...