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» SEU tolerant device, circuit and processor design
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FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
15 years 3 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
DAC
2005
ACM
15 years 10 months ago
High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trad
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
Andrey V. Zykov, Elias Mizan, Margarida F. Jacome,...
ISQED
2005
IEEE
108views Hardware» more  ISQED 2005»
15 years 3 months ago
Error Analysis for the Support of Robust Voltage Scaling
Recently, a new Dynamic Voltage Scaling (DVS) scheme has been proposed that increases energy efficiency significantly by allowing the processor to operate at or slightly below the...
David Roberts, Todd M. Austin, David Blaauw, Trevo...
SPAA
2003
ACM
15 years 3 months ago
The effect of communication costs in solid-state quantum computing architectures
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed un...
Dean Copsey, Mark Oskin, Tzvetan S. Metodi, Freder...
CODES
2005
IEEE
15 years 3 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan