22 search results - page 3 / 5 » SHARP control: controlled shared cache management in chip mu... |
CF
2009
ACM
14 years 24 days ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
SIES
2008
IEEE
14 years 19 days ago
2008
IEEE
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
CF
2006
ACM
13 years 10 months ago
2006
ACM
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
MICRO
2007
IEEE
14 years 16 days ago
2007
IEEE
The trends in enterprise IT toward service-oriented computing, server consolidation, and virtual computing point to a future in which workloads are becoming increasingly diverse i...
ICCD
2005
IEEE
14 years 3 months ago
2005
IEEE
Designing temperature-aware microarchitectures for microprocessors at new technologies is becoming a critical requirement due to the exponentially increasing on-chip power density...