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ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
15 years 10 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
GLOBECOM
2007
IEEE
15 years 10 months ago
AMBER Sched: An Analytical Model Based Resource Scheduler for Programmable Routers
—The growth of the Internet in the last years has been pushed by increasing requirements in terms of capacity, security and reliability. Moreover, improvements in multimedia appl...
Domenico Ficara, Stefano Giordano, Michele Pagano,...
ISPASS
2003
IEEE
15 years 9 months ago
Performance study of a cluster runtime system for dynamic interactive stream-oriented applications
Emerging application domains such as interactive vision, animation, and multimedia collaboration display dynamic scalable parallelism, and high computational requirements, making ...
Arnab Paul, Nissim Harel, Sameer Adhikari, Bikash ...
CCGRID
2005
IEEE
15 years 10 months ago
Cluster security with NVisionCC: process monitoring by leveraging emergent properties
We have observed that supercomputing clusters made up of commodity off-the-shelf computers possess emergent properties that are apparent when these systems are considered as an in...
Gregory A. Koenig, Xin Meng, Adam J. Lee, Michael ...
RT
2001
Springer
15 years 8 months ago
A Perceptually-Based Texture Caching Algorithm for Hardware-Based Rendering
: The performance of hardware-based interactive rendering systems is often constrained by polygon fill rates and texture map capacity, rather than polygon count alone. We present a...
Reynald Dumont, Fabio Pellacini, James A. Ferwerda