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» SOC Test Scheduling Using Simulated Annealing
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MTDT
2003
IEEE
100views Hardware» more  MTDT 2003»
15 years 10 months ago
Optimal Spare Utilization in Repairable and Reliable Memory Cores
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-...
IMSCCS
2006
IEEE
15 years 10 months ago
A New Scheduling Algorithm for Servers
Slowdown is used to measure the fairness degree of a scheduling algorithm in existing work. However, the fairness degree should be considered within a scheduling algorithm; rather...
Nianmin Yao, Wenbin Yao, Shaobin Cai, Jun Ni
ISSE
2010
15 years 3 months ago
A second look at Faster, Better, Cheaper
“Faster, Better, Cheaper” (FBC) was a systems development methodology used by NASA in the 1990s. While usually a deprecated practice, we find that, with certain caveats, it is...
Oussama El-Rawas, Tim Menzies
DAC
2006
ACM
15 years 6 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
EVOW
2010
Springer
15 years 11 months ago
Gaussian Adaptation Revisited - An Entropic View on Covariance Matrix Adaptation
Abstract. We revisit Gaussian Adaptation (GaA), a black-box optimizer for discrete and continuous problems that has been developed in the late 1960’s. This largely neglected sear...
Christian L. Müller, Ivo F. Sbalzarini