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» Sanity Checks in Formal Verification
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FMICS
2008
Springer
14 years 11 months ago
Efficient Symbolic Model Checking for Process Algebras
Different approaches have been developed to mitigate the state space explosion of model checking techniques. Among them, symbolic verification techniques use efficient representati...
José Vander Meulen, Charles Pecheur
QEST
2010
IEEE
14 years 7 months ago
DTMC Model Checking by SCC Reduction
Discrete-Time Markov Chains (DTMCs) are a widely-used formalism to model probabilistic systems. On the one hand, available tools like PRISM or MRMC offer efficient model checking a...
Erika Ábrahám, Nils Jansen, Ralf Wim...
EUROMICRO
2000
IEEE
15 years 2 months ago
Formal Coverification of Embedded Systems Using Model Checking
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for har...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
15 years 1 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...
PPOPP
2009
ACM
15 years 10 months ago
Formal verification of practical MPI programs
This paper considers the problem of formal verification of MPI programs operating under a fixed test harness for safety properties without building verification models. In our app...
Anh Vo, Sarvani S. Vakkalanka, Michael Delisi, Gan...