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» Sanity Checks in Formal Verification
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DAC
2006
ACM
16 years 23 days ago
Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
Xiushan Feng, Alan J. Hu
TDSC
2010
172views more  TDSC 2010»
14 years 6 months ago
Proactive Detection of Computer Worms Using Model Checking
Although recent estimates are speaking of 200,000 different viruses, worms, and Trojan horses, the majority of them are variants of previously existing malware. As these variants m...
Johannes Kinder, Stefan Katzenbeisser, Christian S...
ICSE
2007
IEEE-ACM
15 years 12 months ago
Randomized Differential Testing as a Prelude to Formal Verification
Most flight software testing at the Jet Propulsion Laboratory relies on the use of hand-produced test scenarios and is executed on systems as similar as possible to actual mission...
Alex Groce, Gerard J. Holzmann, Rajeev Joshi
ATAL
2010
Springer
15 years 28 days ago
Model checking detectability of attacks in multiagent systems
Information security is vital to many multiagent system applications. In this paper we formalise the notion of detectability of attacks in a MAS setting and analyse its applicabil...
Ioana Boureanu, Mika Cohen, Alessio Lomuscio
COOPIS
2004
IEEE
15 years 3 months ago
Checking Asynchronously Communicating Components Using Symbolic Transition Systems
Abstract. Explicit behavioural interface description languages (BIDLs, protocols) are now recognized as a mandatory feature of component languages in order to address component reu...
Olivier Maréchal, Pascal Poizat, Jean-Claud...