314 search results - page 22 / 63 » Sanity Checks in Formal Verification |
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
ASE
2005
14 years 9 months ago
2005
Abstract. Model checking is an automated technique that can be used to determine whether a system satisfies certain required properties. The typical approach to verifying propertie...
ENTCS
2002
14 years 9 months ago
2002
Abstract: Alias analysis for Fortran is less complicated than for programming languages with pointers but many real Fortran programs violate the standard: a formal parameter or a c...
FM
2008
Springer
14 years 11 months ago
2008
Springer
Interface automata provide a formalism capturing the high level interactions between software components. Checking compatibility, and other safety properties, in an automata-based ...