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» Sanity Checks in Formal Verification
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SIGSOFT
2006
ACM
15 years 10 months ago
SYNERGY: a new algorithm for property checking
We consider the problem if a given program satisfies a specified safety property. Interesting programs have infinite state spaces, with inputs ranging over infinite domains, and f...
Bhargav S. Gulavani, Thomas A. Henzinger, Yamini K...
DSD
2005
IEEE
116views Hardware» more  DSD 2005»
15 years 3 months ago
Validation of Embedded Systems Using Formal Method Aided Simulation
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
Daniel Karlsson, Petru Eles, Zebo Peng
SIGSOFT
2009
ACM
15 years 10 months ago
Probabilistic environments in the quantitative analysis of (non-probabilistic) behaviour models
System specifications have long been expressed through automata-based languages, enabling verification techniques such as model checking. These verification techniques can assess ...
Esteban Pavese, Sebastián Uchitel, Ví...
ESORICS
2002
Springer
15 years 9 months ago
Formal Security Analysis with Interacting State Machines
We introduce the ISM approach, a framework for modeling and verifying reactive systems in a formal, even machine-checked, way. The framework has been developed for applications in ...
David von Oheimb, Volkmar Lotz
ISQED
2010
IEEE
126views Hardware» more  ISQED 2010»
14 years 11 months ago
Modeling and verification of industrial flash memories
We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate d...
Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronal...