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» Sanity Checks in Formal Verification
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89
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VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
15 years 10 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
FMICS
2010
Springer
14 years 10 months ago
Model Checking the FlexRay Physical Layer Protocol
Abstract. The FlexRay standard, developed by a cooperation of leading companies in the automotive industry, is a robust communication protocol for distributed components in modern ...
Michael Gerke 0002, Rüdiger Ehlers, Bernd Fin...
103
Voted
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
15 years 1 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
WWW
2004
ACM
15 years 10 months ago
A combined approach to checking web ontologies
The understanding of Semantic Web documents is built upon ontologies that define concepts and relationships of data. Hence, the correctness of ontologies is vital. Ontology reason...
Jin Song Dong, Chew Hung Lee, Hian Beng Lee, Yuan-...
AOSD
2009
ACM
15 years 3 days ago
Modular verification of dynamically adaptive systems
Cyber-physical systems increasingly rely on dynamically adaptive programs to respond to changes in their physical environment; examples include ecosystem monitoring and disaster r...
Ji Zhang, Heather Goldsby, Betty H. C. Cheng