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» Sanity Checks in Formal Verification
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DATE
2004
IEEE
147views Hardware» more  DATE 2004»
15 years 1 months ago
Formal Refinement and Model Checking of an Echo Cancellation Unit
This article presents an approach, which combines theorem proving-based refinement with model checking for state based real-time systems. Our verification flow starts from UML sta...
Alexander Krupp, Wolfgang Müller 0003, Ian Ol...
POPL
2006
ACM
15 years 10 months ago
Hybrid type checking
Traditional static type systems are very effective for verifying basic interface specifications, but are somewhat limited in the kinds specificationsthey support. Dynamically-chec...
Cormac Flanagan
HASE
1999
IEEE
15 years 1 months ago
Model Checking UML Statechart Diagrams Using JACK
Statechart Diagrams provide a graphical notation for describing dynamic aspects of system behaviour within the Unified Modeling Language (UML). In this paper we present a branchin...
Stefania Gnesi, Diego Latella, Mieke Massink
ENTCS
2002
107views more  ENTCS 2002»
14 years 9 months ago
Monitoring, Checking, and Steering of Real-Time Systems
The MaC system has been developed to provide assurance that a target program is running correctly with respect to formal requirements specification. This is achieved by monitoring...
Moonjoo Kim, Insup Lee, Usa Sammapun, Jangwoo Shin...
FM
2006
Springer
169views Formal Methods» more  FM 2006»
15 years 1 months ago
PSL Model Checking and Run-Time Verification Via Testers
Abstract. The paper introduces the construct of temporal testers as a compositional basis for the construction of automata corresponding to temporal formulas in the PSL logic. Temp...
Amir Pnueli, Aleksandr Zaks