Sciweavers

242 search results - page 33 / 49
» Satellite Data Exploitation Design Architecture
Sort
View
150
Voted
PLDI
1993
ACM
15 years 2 months ago
Global Optimizations for Parallelism and Locality on Scalable Parallel Machines
Data locality is critical to achievinghigh performance on large-scale parallel machines. Non-local data accesses result in communication that can greatly impact performance. Thus ...
Jennifer-Ann M. Anderson, Monica S. Lam
75
Voted
ICASSP
2008
IEEE
15 years 4 months ago
Analyzing the scalability of SIMD for the next generation software defined radio
Previous studies have shown that wireless DSP algorithms exhibit high levels of data level parallelism (DLP). Commercial and research work in the field of software defined radio...
Mark Woh, Yuan Lin, Sangwon Seo, Trevor N. Mudge, ...
CODES
2006
IEEE
15 years 4 months ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya
EUROPAR
2009
Springer
15 years 2 months ago
Fast and Efficient Synchronization and Communication Collective Primitives for Dual Cell-Based Blades
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
Epifanio Gaona, Juan Fernández, Manuel E. A...
ISLPED
2007
ACM
96views Hardware» more  ISLPED 2007»
14 years 11 months ago
Low-power process-variation tolerant arithmetic units using input-based elastic clocking
In this paper we propose a design methodology for low-power, high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in th...
Debabrata Mohapatra, Georgios Karakonstantis, Kaus...