713 search results - page 80 / 143 » Saving Space by Algebraization |
DATE
2003
IEEE
2003
IEEE
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
15 years 5 months ago
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...
68
Voted
ISLPED
2003
ACM
15 years 5 months ago
2003
ACM
Dual-supply voltage design using a clustered voltage scaling (CVS) scheme is an effective approach to reduce chip power. The optimal CVS design relies on a level converter (LC) im...
83
Voted
ADBIS
2003
Springer
15 years 5 months ago
2003
Springer
In this paper we present a new compression scheme for signature tree structures. Beyond the reduction of storage space, compression attains significant savings in terms of query pr...
FPL
2009
Springer
15 years 5 months ago
2009
Springer
This paper presents a methodology for estimating and optimising FPGA routing fabrics using high-level modelling and convex optimisation techniques. Experimental methods for explor...
84
Voted
INFOVIS
2000
IEEE
15 years 5 months ago
2000
IEEE
Drawing on ethnographic studies of (landscape) architects at work, and interdisciplinary cooperation with them, this paper presents a human-centered approach to information visual...