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SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
16 years 19 days ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...
SIPS
2008
IEEE
16 years 19 days ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
AINA
2007
IEEE
16 years 18 days ago
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
Antonio Flores, Juan L. Aragón, Manuel E. A...
ASIAMS
2007
IEEE
16 years 18 days ago
On Syntactic Composability and Model Reuse
Composability, the capability to select and assemble offthe-shelf model components in various combinations to satisfy user requirements, is an appealing approach in reducing the t...
Claudia Szabo, Yong Meng Teo
AVSS
2007
IEEE
16 years 18 days ago
Experiments with patch-based object classification
We present and experiment with a patch-based algorithm for the purpose of object classification in video surveillance. A feature vector is calculated based on template matching o...
Rob G. J. Wijnhoven, Peter H. N. de With