2271 search results - page 370 / 455 » Scalable Software Libraries |
124
Voted
HIPEAC
2007
Springer
15 years 9 months ago
2007
Springer
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
137
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CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
132
Voted
CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
Real-time multi-media applications are increasingly being mapped onto MPSoC (multi-processor system-on-chip) platforms containing hardware-software IPs (intellectual property) alo...
122
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ISCA
2006
IEEE
15 years 9 months ago
2006
IEEE
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
125
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ISPASS
2006
IEEE
15 years 9 months ago
2006
IEEE
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...