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FPL
2010
Springer
170views Hardware» more  FPL 2010»
15 years 2 months ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
ICS
2007
Tsinghua U.
15 years 10 months ago
Representation-transparent matrix algorithms with scalable performance
Positive results from new object-oriented tools for scientific programming are reported. Using template classes, abstractions of matrix representations are available that subsume...
Peter Gottschling, David S. Wise, Michael D. Adams
CCGRID
2003
IEEE
15 years 10 months ago
DKS (N, k, f): A Family of Low Communication, Scalable and Fault-Tolerant Infrastructures for P2P Applications
In this paper, we present DKS(N, k, f), a family of infrastructures for building Peer-To-Peer applications. Each instance of DKS(N, k, f) is a fully decentralized overlay network ...
Luc Onana Alima, Sameh El-Ansary, Per Brand, Seif ...
PODC
2003
ACM
15 years 10 months ago
An asynchronous protocol for distributed computation of RSA inverses and its applications
This paper presents an efficient asynchronous protocol to compute RSA inverses with respect to a public RSA modulus N whose factorization is secret and shared among a group of pa...
Christian Cachin
IPPS
1998
IEEE
15 years 9 months ago
Processor Lower Bound Formulas for Array Computations and Parametric Diophantine Systems
Using a directed acyclic graph (dag) model of algorithms, we solve a problem related to precedenceconstrained multiprocessor schedules for array computations: Given a sequence of ...
Peter R. Cappello, Ömer Egecioglu