In this paper, we present network-on-chip (NoC) design and contrast it to traditional network design, highlighting similarities and differences between the two. As an initial case...
George Nychis, Chris Fallin, Thomas Moscibroda, On...
Scalable heterogeneous computing systems, which are composed of a mix of compute devices, such as commodity multicore processors, graphics processors, reconfigurable processors, ...
Anthony Danalis, Gabriel Marin, Collin McCurdy, Je...
Abstract—Accelerating multi-pattern matching is a critical issue in building high-performance deep packet inspection systems. Achieving high-throughputs while reducing both memor...
1 Routers need buffers to store and forward packets, especially when there is network congestion. With current memory technology, neither the SRAM nor the DRAM alone is suitabl...
— We present a software infrastructure that embeds physical hosts in a simulated network. Aiming to create a largescale real-time virtual network testbed, our real-time interacti...
Jason Liu, Scott Mann, Nathanael Van Vorst, Keith ...