105 search results - page 14 / 21 » Scalable shared memory LTL model checking |
125
Voted
ERSA
2010
14 years 9 months ago
2010
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
108
Voted
CORR
2010
Springer
14 years 11 months ago
2010
Springer
r of Abstraction (invited lecture) . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Barbara Liskov Fast Asynchronous Consensus with Optimal Resilience. . . . . . . . . . . ....
EUROSYS
2007
ACM
15 years 8 months ago
2007
ACM
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
HICSS
1999
IEEE
15 years 4 months ago
1999
IEEE
Distributed Shared Memory (DSM) combines the scalability of loosely coupled multicomputer systems with the ease of usability of tightly coupled multiprocessors, and allows transpa...
112
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ICC
2011
IEEE
13 years 11 months ago
2011
IEEE
Abstract—Content-Centric Networking is a new communication architecture that rethinks the Internet communication model, designed for point-to-point connections between hosts, and...