433 search results - page 24 / 87 » Scale in Chip Interconnect requires Network Technology |
CODES
2009
IEEE
15 years 4 months ago
2009
IEEE
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
SIGCOMM
2003
ACM
15 years 2 months ago
2003
ACM
Routers built around a single-stage crossbar and a centralized scheduler do not scale, and (in practice) do not provide the throughput guarantees that network operators need to ma...
76
Voted
HPCA
2009
IEEE
15 years 4 months ago
2009
IEEE
On-network hardware support for multi-destination traffic is a desirable feature in most multiprocessor machines. Multicast hardware capabilities enable much more effective bandwi...
71
Voted
DATE
2010
IEEE
14 years 8 months ago
2010
IEEE
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...