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» Scale in Chip Interconnect requires Network Technology
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TC
2010
14 years 8 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
ITCC
2005
IEEE
15 years 3 months ago
A RDT-Based Interconnection Network for Scalable Network-on-Chip Designs
The interconnection network plays an important role in the performance and energy consumption of a Networkon-Chip (NoC) system. In this paper, we propose a RDT(2,2,1)/α-based int...
Yang Yu, Mei Yang, Yulu Yang, Yingtao Jiang
DATE
2000
IEEE
132views Hardware» more  DATE 2000»
15 years 2 months ago
A Generic Architecture for On-Chip Packet-Switched Interconnections
This paper presents an architectural study of a scalable system-level interconnection template. We explain why the shared bus, which is today's dominant template, will not me...
Pierre Guerrier, Alain Greiner
DAC
2010
ACM
15 years 1 months ago
Networks on Chips: from research to products
Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address th...
Giovanni De Micheli, Ciprian Seiculescu, Srinivasa...