433 search results - page 32 / 87 » Scale in Chip Interconnect requires Network Technology |
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract— Providing Quality-of-Service (QoS) in networks-onchip (NoCs) will be an important consideration for the complex multiprocessor chips of the future. In this paper, we di...
70
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MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissi...
103
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NOCS
2007
IEEE
15 years 4 months ago
2007
IEEE
Abstract— The behaviour of systems on chip (SOC) is complex because they contain multiple processors that interact through concurrent interconnects, such as networks on chip (NOC...
IJCAI
1997
14 years 11 months ago
1997
This paper describes an evolvable hardware (EHW) system for generalized neural network learning. We have developed an ASIC VLSI chip, which is a building block to configure a scal...
131
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ISCC
2009
IEEE
15 years 4 months ago
2009
IEEE
Chord is a protocol to distribute and retrieve information at large scale. It builds a large but rigid overlay network without taking into account the social nature and the underl...