433 search results - page 45 / 87 » Scale in Chip Interconnect requires Network Technology |
MICRO
2010
IEEE
14 years 9 months ago
2010
IEEE
High density memory is becoming more important as many execution streams are consolidated onto single chip many-core processors. DRAM is ubiquitous as a main memory technology, but...
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PPNA
2011
14 years 6 months ago
2011
The proliferation of novel wireless network technologies creates new opportunities for complex peerto-peer information dissemination systems. A key challenge that remains in this a...
CORR
2008
Springer
14 years 12 months ago
2008
Springer
Emerging 3D chips stacking and MEMS/Sensors packaging technologies are using DRIE (Deep Reactive Ion Etching) to etch Through-Silicon Via (TSV) for advanced interconnections. The ...
CIKM
2005
Springer
15 years 5 months ago
2005
Springer
With this work we aim to make a three-fold contribution. We first address the issue of supporting efficiently queries over string-attributes involving prefix, suffix, containmen...
DATE
2005
IEEE
15 years 5 months ago
2005
IEEE
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...