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» Scale in Chip Interconnect requires Network Technology
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CODES
2005
IEEE
15 years 3 months ago
Blue matter on blue gene/L: massively parallel computation for biomolecular simulation
This paper provides an overview of the Blue Matter application development effort within the Blue Gene project that supports our scientific simulation efforts in the areas of pro...
Robert S. Germain, Blake G. Fitch, Aleksandr Raysh...
MICRO
2008
IEEE
139views Hardware» more  MICRO 2008»
15 years 4 months ago
Adaptive data compression for high-performance low-power on-chip networks
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
Yuho Jin, Ki Hwan Yum, Eun Jung Kim
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
15 years 3 months ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...
CCGRID
2003
IEEE
15 years 3 months ago
Using grid technologies to face medical image analysis challenges
The availability of digital imagers inside hospitals and their ever growing inspection capabilities have established digital medical images as a key component of many pathologies ...
Johan Montagnat, Vincent Breton, Isabelle E. Magni...
SIGMETRICS
1997
ACM
164views Hardware» more  SIGMETRICS 1997»
15 years 1 months ago
File Server Scaling with Network-Attached Secure Disks
By providing direct data transfer between storage and client, network-attached storage devices have the potential to improve scalability for existing distributed file systems (by...
Garth A. Gibson, David Nagle, Khalil Amiri, Fay W....