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» Scale in Chip Interconnect requires Network Technology
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HPCC
2005
Springer
15 years 3 months ago
Enabling the P2P JXTA Platform for High-Performance Networking Grid Infrastructures
Abstract. As grid sizes increase, the need for self-organization and dynamic reconfigurations is becoming more and more important, and therefore the convergence of grid computing ...
Gabriel Antoniu, Mathieu Jan, David A. Noblet
MR
2010
120views Robotics» more  MR 2010»
14 years 8 months ago
Automated inspection and classification of flip-chip-contacts using scanning acoustic microscopy
Industrial applications often require failure analysis methods working non-destructively, enabling either a rapid quality control or fault isolation and defect localization prior ...
S. Brand, P. Czurratis, P. Hoffrogge, M. Petzold
MOBIHOC
2000
ACM
15 years 2 months ago
DEAPspace: transient ad-hoc networking of pervasive devices
The rapid spreading of mobile computerized devices marks the beginning of a new computing paradigm characterized by ad hoc networking and spontaneous interaction, taking place tra...
Reto Hermann, Dirk Husemann, Michael Moser, Michae...
73
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IPPS
2005
IEEE
15 years 3 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
CISS
2007
IEEE
14 years 11 months ago
Quantum Switching Networks with Classical Routing
— Flexible distribution of data in the form of quantum bits (qubits) amongst spatially separated entities is an essential component of envisioned scalable quantum computing archi...
Rahul Ratan, Manish Kumar Shukla, A. Yavuz Oru&cce...