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» Scale in Chip Interconnect requires Network Technology
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PARELEC
2000
IEEE
15 years 1 months ago
Parallel Computing Environments and Methods
Recent advances in high-speed networks, rapid improvements in microprocessor design, and availability of highly performing clustering software implementations enables cost-effecti...
Ghassan Fadlallah, Michel Lavoie, Louis-A. Dessain...
ITCC
2005
IEEE
15 years 3 months ago
NIPPERS: Network of InterPolated PeERS for Web Service Discovery
Web services are becoming an important enabler of the Semantic Web. Besides the need for a rich description mechanism, Web Service information should be made available in an acces...
Christos Makris, Evangelos Sakkopoulos, Spyros Sio...
ITNG
2010
IEEE
15 years 1 months ago
QARI: Quality Aware Software Deployment for Wireless Sensor Networks
Abstract--If we are to deploy sensor applications in a realistic business context, we must provide innovative middleware services to control and enforce required system behavior; i...
Wouter Horré, Sam Michiels, Wouter Joosen, ...
EPEW
2008
Springer
14 years 11 months ago
Evaluation of P2P Algorithms for Probabilistic Trust Inference in a Web of Trust
The problem of finding trust paths and estimating the trust one can place in a partner arises in various application areas, including virtual organisations, authentication systems ...
Huqiu Zhang, Aad P. A. van Moorsel
TC
2011
14 years 4 months ago
StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs
—CMOS scaling has long been a source of dramatic performance gains. However, semiconductor feature size reduction has resulted in increasing levels of operating temperatures and ...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...