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» Scale in Chip Interconnect requires Network Technology
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101
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DSN
2005
IEEE
15 years 5 months ago
Reversible Fault-Tolerant Logic
It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiti...
P. Oscar Boykin, Vwani P. Roychowdhury
95
Voted
ICC
2011
IEEE
201views Communications» more  ICC 2011»
13 years 11 months ago
Survivable Optical Grid Dimensioning: Anycast Routing with Server and Network Failure Protection
Abstract—Grids can efficiently deal with challenging computational and data processing tasks which cutting edge science is generating today. So-called e-Science grids cope with ...
Chris Develder, Jens Buysse, Ali Shaikh, Brigitte ...
124
Voted
ICS
2009
Tsinghua U.
15 years 4 months ago
Exploring pattern-aware routing in generalized fat tree networks
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...
Germán Rodríguez, Ramón Beivi...
ECRTS
2005
IEEE
15 years 5 months ago
Applying Static WCET Analysis to Automotive Communication Software
The number of embedded computers used in modern cars have increased dramatically during the last years, as they provide increased functionality to a reduced cost compared to previ...
Susanna Byhlin, Andreas Ermedahl, Jan Gustafsson, ...
114
Voted
SSS
2010
Springer
139views Control Systems» more  SSS 2010»
14 years 10 months ago
Vulnerability Analysis of High Dimensional Complex Systems
Complex systems experience dramatic changes in behavior and can undergo transitions from functional to dysfunctional states. An unstable system is prone to dysfunctional collective...
Vedant Misra, Dion Harmon, Yaneer Bar-Yam