234 search results - page 12 / 47 » Scaling, Power and the Future of CMOS |
ISLPED
2010
ACM
14 years 9 months ago
2010
ACM
Booth encoding is believed to yield faster multiplier designs with higher energy consumption. 16x16-bit Booth and NonBooth multipliers are analyzed in energy and delay space under...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
52
Voted
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
— Continued scaling of CMOS has lead to a problem of scale as gates are faster than light travelling across a chip. Scalability used to be the hallmark of CMOS. Half the size, do...
133
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INFOCOM
2012
IEEE
13 years 1 days ago
2012
IEEE
Abstract—Capacity scaling laws offer fundamental understanding on the trend of user throughput behavior when the network size increases. Since the seminal work of Gupta and Kumar...
92
Voted
ISCAS
2007
IEEE
15 years 3 months ago
2007
IEEE
Abstract—In the nanometer-scale CMOS technology, the gateoxide thickness has been scaled down to support a higher operating speed under a lower power supply (1xVDD). However, the...