234 search results - page 6 / 47 » Scaling, Power and the Future of CMOS |
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
—In this paper we study the effectiveness of two power gating methods – transistor switches and MEMS switches – in reducing the power consumption of a design with a certain t...
ISQED
2005
IEEE
15 years 3 months ago
2005
IEEE
The purpose of this work is to explore how device operation parameters such as switching speed and power dissipation scale with voltage and temperature. We simulated a CMOS ring o...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
—A low-power high-SFDR CMOS direct digital frequency synthesizer (DDFS) is presented. Several design techniques, including a cell-based lookup table, a power aware parameters sel...
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ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
As CMOS scales beyond the 45nm technology node, leakage concerns are starting to limit microprocessor performance growth. To keep dynamic power constant across process generations...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...