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ISCA
1999
IEEE
87views Hardware» more  ISCA 1999»
15 years 5 months ago
Scaling Application Performance on a Cache-Coherent Multiprocessors
Dongming Jiang, Jaswinder Pal Singh
146
Voted
ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
15 years 5 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
114
Voted
IPPS
1998
IEEE
15 years 5 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
113
Voted
HPCA
1995
IEEE
15 years 4 months ago
Software Cache Coherence for Large Scale Multiprocessors
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
Leonidas I. Kontothanassis, Michael L. Scott
141
Voted
DSN
2011
IEEE
14 years 27 days ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li