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DAC
2008
ACM
15 years 10 months ago
Daedalus: toward composable multimedia MP-SoC design
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
Hristo Nikolov, Mark Thompson, Todor Stefanov, And...
IESS
2007
Springer
92views Hardware» more  IESS 2007»
15 years 3 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
ICSE
2008
IEEE-ACM
15 years 9 months ago
A value-based approach for documenting design decisions rationale: a replicated experiment
The explicit documentation of the rationale of design decisions is a practice generally encouraged but rarely implemented in industry because of a variety of inhibitors. Known met...
Davide Falessi, Rafael Capilla, Giovanni Cantone
DATE
2005
IEEE
98views Hardware» more  DATE 2005»
15 years 3 months ago
Hardware Accelerated Power Estimation
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the ob...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
WSC
2007
15 years 2 days ago
Modeling and simulation of hard disk dive final assembly using a HDD template
A HDD template is designed and developed for modeling and simulation for final assembly of hard disk drive (HDD) manufacturing using Arena. The designed HDD template is a high fle...
Ahad Ali, Robert de Souza