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» Scenario-based Validation of Embedded Systems
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74
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SCOPES
2005
Springer
15 years 2 months ago
Software Synthesis from the Dataflow Interchange Format
Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingl...
Chia-Jui Hsu, Shuvra S. Bhattacharyya
89
Voted
CODES
2008
IEEE
14 years 11 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...
79
Voted
SAC
2010
ACM
14 years 9 months ago
Graph-based verification of static program constraints
Software artifacts usually have static program constraints and these constraints should be satisfied in each reuse. In addition to this, the developers are also required to satisf...
Selim Ciraci, Pim van den Broek, Mehmet Aksit
TMI
2011
182views more  TMI 2011»
14 years 4 months ago
Active Volume Models for Medical Image Segmentation
—In this paper, we propose a novel predictive model, active volume model (AVM), for object boundary extraction. It is a dynamic “object” model whose manifestation includes a ...
Tian Shen, Hongsheng Li, Xiaolei Huang
CODES
2007
IEEE
15 years 3 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...