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» Scenario-based Validation of Embedded Systems
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MEMOCODE
2010
IEEE
14 years 7 months ago
LTSs for translation validation of (multi-clocked) SIGNAL specifications
Design of critical embedded systems demands for guarantees on the reliability of the implementation/compilation of a specification. In general, this guarantee takes either the form...
Julio C. Peralta, Thierry Gautier, Loïc Besna...
PASTE
2004
ACM
15 years 2 months ago
Validation of assembler programs for DSPs: a static analyzer
Digital Signal Processors are widely used in critical embedded systems to pilot low-level, often critical functionalities. We describe a static analyzer based on abstract interpre...
Matthieu Martel
106
Voted
CODES
2005
IEEE
15 years 3 months ago
Enhancing security through hardware-assisted run-time validation of program data properties
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This i...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
CEJCS
2011
80views more  CEJCS 2011»
13 years 9 months ago
Evaluating distributed real-time and embedded system test correctness using system execution traces
: Effective validation of distributed real-time and embedded (DRE) system quality-of-service (QoS) properties (e.g., event prioritization, latency, and throughput) requires testin...
James H. Hill, Pooja Varshneya, Douglas C. Schmidt
DSN
2000
IEEE
15 years 1 months ago
An Automatic SPIN Validation of a Safety Critical Railway Control System
This paper describes an experiment in formal specification and validation performed in the context of an industrial joint project. The project involved an Italian company working...
Stefania Gnesi, Diego Latella, Gabriele Lenzini, C...