Timing Closure in presence of long global wire interconnects is one of the main current issues in System-onChip design. One proposed solution to the Timing Closure problem is Late...
Robert Thomas has shown, using simulations of experimental results, that the power flow on any line in an electric network is linearly proportional to the total system load when t...
Nodir Adilov, Thomas Light, Richard E. Schuler, Wi...
This paper addresses the problem of distributed resource allocation in general fork and join processing networks. The problem is motivated by the complicated processing requiremen...
Haiquan (Chuck) Zhao, Cathy H. Xia, Zhen Liu, Dona...
Execution plans produced by traditional query optimizers for data integration queries may yield poor performance for several reasons. The cost estimates may be inaccurate, the mem...
Instruction scheduling is an important step for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction scheduling is to ...
Abid M. Malik, Tyrel Russell, Michael Chase, Peter...