We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
The application of pattern recognition (PR) techniques, artificial neural networks (ANNs), and nowadays hybrid artificial intelligence (AI) techniques in manufacturing can be regar...
In this paper we have characterized the inter-arrival time and service time distributions for jobs at a large MPP supercomputing center. Our findings show that the distributions ...
In microarchitecure synthesis, early algorithms considered only a single implementation technique for IF -statements. Focus was on scheduling and on maximum hardware sharing. In t...
We consider the throughput/delay tradeoffs for scheduling data transmissions in a mobile ad hoc network. To reduce delays in the network, each user sends redundant packets along mu...