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132
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IPPS
1998
IEEE
15 years 9 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
IEAAIE
1998
Springer
15 years 9 months ago
Soft Computing and Hybrid AI Approaches to Intelligent Manufacturing
The application of pattern recognition (PR) techniques, artificial neural networks (ANNs), and nowadays hybrid artificial intelligence (AI) techniques in manufacturing can be regar...
Laszlo Monostori, József Hornyák, Cs...
122
Voted
JSSPP
1997
Springer
15 years 9 months ago
Modeling of Workload in MPPs
In this paper we have characterized the inter-arrival time and service time distributions for jobs at a large MPP supercomputing center. Our findings show that the distributions ...
Joefon Jann, Pratap Pattnaik, Hubertus Franke, Fan...
102
Voted
IFIP
1992
Springer
15 years 9 months ago
Implementations of IF-statements in the TODOS microarchitecture synthesis system
In microarchitecure synthesis, early algorithms considered only a single implementation technique for IF -statements. Focus was on scheduling and on maximum hardware sharing. In t...
Peter Marwedel
BROADNETS
2004
IEEE
15 years 8 months ago
Capacity and Delay Tradeoffs for Ad-Hoc Mobile Networks
We consider the throughput/delay tradeoffs for scheduling data transmissions in a mobile ad hoc network. To reduce delays in the network, each user sends redundant packets along mu...
Michael J. Neely, Eytan Modiano