Sciweavers

3563 search results - page 571 / 713
» Scheduling Algorithms for Procrastinators
Sort
View
CODES
2007
IEEE
15 years 11 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
DAC
1997
ACM
15 years 9 months ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
POPL
2010
ACM
16 years 2 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
ICDM
2007
IEEE
131views Data Mining» more  ICDM 2007»
15 years 11 months ago
Parallel Mining of Frequent Closed Patterns: Harnessing Modern Computer Architectures
Inspired by emerging multi-core computer architectures, in this paper we present MT CLOSED, a multi-threaded algorithm for frequent closed itemset mining (FCIM). To the best of ou...
Claudio Lucchese, Salvatore Orlando, Raffaele Pere...
EUROCAST
2007
Springer
102views Hardware» more  EUROCAST 2007»
15 years 11 months ago
Trajectory Planning in a Crossroads for a Fleet of Driverless Vehicles
In the context of Intelligent Transportation Systems based on driverless vehicles, one important issue is the passing of a crossroads. This paper presents a supervised reservation ...
Olivier Mehani, Arnaud de La Fortelle